Izmo shares jump 5% as arm develops 3D SiP module for space electronics

By using advanced "3D stacking" technology, Izmo re-engineered a standard 200mm x 200mm electronics board into a compact 81mm ...
EDN

Sharp develops 3D-SiP with 0.5-mm ball pitch

LONDON — Sharp Corp. has developed a 0.5-mm ball pitch technology for 3D systems-in-package (3D-SiP). The company is able to stack a digital signal processor, flash memory, and synchronous DRAM chips ...
EDN

3D Stacking Offers New Path to Optimum Integrated Analog Performance

Designers, who need to build high performance real-time sensing systems, are greatly challenged since every building block in the system needs to be built with a technology that allows that building ...
eTeknix

TSMC Announces Wafer-on-Wafer 3D Stacking Technology

Taiwan Semiconductor Manufacturing Company Ltd (TSMC), the world’s largest chip contract manufacturer in the world is announcing their new 3D stacking technology called Wafer-on-Wafer (WoW). This ...
TweakTown

AMD details its next-gen 3D V-Cache stacking technology

AMD has better detailed its next-gen 3D V-Cache stacking technology, where at the exciting but all-digital Hot Chips 33 symposium the company teased its current, and even future 3D stacking ...
Semiconductor Engineering

Thermal Analysis Of 3D Stacking And BEOL Technologies

Thermal challenges in 3D-IC designs can cause a significant risk in meeting performance specifications. While the pace of Moore’s Law has slowed in recent years, system technology co-optimization ...