EDN

Design verification and debugging FPGA implementations

Verification takes as much as 70% of an ASIC's development time and resources. With growing ASIC complexity, verification problems are growing exponentially. Given the high cost of ASIC mask sets, the ...
EDN

FPGA verification in embedded video-processing systems

Participating in the consumer-electronics segment has many advantages. Despite that fact, design teams in this segment will encounter a drastically reduced time-to-market window. Consequently, FPGA ...
Electronics Weekly

FPGA functional verification: why bother?

FPGA engineers are all doing functional verification using manual processes but growing system comlexity is the issue. Changing tools and methodologies may seem daunting, but there is a way to break ...
Yahoo Finance

WiMi Develops FPGA(Field-Programmable Gate Array)-Based Digital Quantum Computer Verification Technology

BEIJING, Jan. 31, 2025 /PRNewswire/ -- WiMi Hologram Cloud Inc. (NASDAQ: WiMi) ("WiMi" or the "Company"), a leading global Hologram Augmented Reality ("AR") Technology provider, today announced the ...
Electronic Design

Facing Up To Today’s FPGA Verification Challenges

Fifteen years ago verification of FPGA designs was easy but as the size of FPGAs has increased so have the verification challenges, Jerry Kaczynski explains. Today it is not unusual for FPGA users to ...
Business Wire

InterMotion Technology Boosts IP Verification Productivity for Lattice Semiconductor’s CrossLink FPGA Family Using Aldec’s Active-HDL

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, today announced that InterMotion Technology has ...
Electronics Weekly

FPGA verification for DO-254 is in the hardware

Verifying a complex FPGA design under DO-254 guidelines for use in safety- and mission-critical airborne systems is not without its challenges. Louie De Luna, Aldec Europe’s Product Manager for DO-254 ...
New Electronics

Faster FPGA verification

Launched in 2015, and used by about 20% of all VHDL FPGA designers, UVVM is one of the fastest growing verification methodologies in the EDA industry. Today, design verification accounts for more than ...
Design-Reuse

Real Intent Introduces Meridian FPGA, Popular Clock Domain Crossing Verification Software for Altera Customers

Sunnyvale, California - November 5, 2008- Real Intent, Inc., the leading supplier of verification software for electronic design, announced its first release of Meridian FPGAâ„¢ verification software.
Semiconductor Engineering

Verification Effectiveness In The Face Of FPGA Complexity: The 2020 Wilson Research Group Functional Verification Study

Making informed decisions backed by good data is the key to success in highly competitive, robust markets such as FPGA design and verification. Helping our community in that endeavor is the motivation ...
Semiconductor Engineering

Trends In FPGA Effectiveness: The 2018 Wilson Research Group Functional Verification Study

We all know that knowledge is power. The adage holds true even in the prosaic case of making informed decisions backed by good data. Our hope and motivation in conducting the worldwide Wilson Research ...